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622Mbps、3.3V时钟恢复与数据再定时IC,带有限幅放大器

高性能、低功耗622Mbps CDR

产品详情

The MAX3676 is a complete clock-recovery and data-retiming IC incorporating a limiting amplifier. It is intended for 622Mbps SDH/SONET applications and operates from a single +3.3V supply.

The MAX3676 is designed for both section-regenerator and terminal-receiver applications in OC12/STM-4 transmission systems. Its jitter performance exceeds all SONET/SDH specifications.

The MAX3676 has two differential input amplifiers: one accepts positive-referenced emitter-coupled logic (PECL) levels, while the other accepts small-signal analog levels. The analog inputs access the limiting amplifier stage, which provides both a received-signal-strength indicator (RSSI) and a programmable-threshold loss-of-power (LOP) monitor. Selecting the PECL amplifier disables the limiting amplifier, conserving power. A loss-of-lock (LOL) monitor is also incorporated as part of the fully integrated phase-locked loop (PLL).

主要特征

  • Single +3.3V or +5.0V Power Supply
  • Exceeds ITU/Bellcore SDH/SONET Regenerator Specifications
  • Low Power: 237mW at +3.3V
  • Selectable Data Inputs, Differential PECL or Analog
  • Received-Signal-Strength Indicator
  • Loss-of-Power and Loss-of-Lock Monitors
  • Differential PECL Clock and Data Outputs
  • No External Reference Clock Required

应用/用途

  • 上/下路复用器
  • ATM交换
  • 数字交叉连接
  • SDH/SONET接入节点
  • SDH/SONET接收器与再生器

简化框图

MAX3676:典型工作电路 MAX3676:典型工作电路 Zoom icon

技术文档

设计与质量

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参量

主要特征

  • Single +3.3V or +5.0V Power Supply
  • Exceeds ITU/Bellcore SDH/SONET Regenerator Specifications
  • Low Power: 237mW at +3.3V
  • Selectable Data Inputs, Differential PECL or Analog
  • Received-Signal-Strength Indicator
  • Loss-of-Power and Loss-of-Lock Monitors
  • Differential PECL Clock and Data Outputs
  • No External Reference Clock Required

应用/用途

  • 上/下路复用器
  • ATM交换
  • 数字交叉连接
  • SDH/SONET接入节点
  • SDH/SONET接收器与再生器

描述

The MAX3676 is a complete clock-recovery and data-retiming IC incorporating a limiting amplifier. It is intended for 622Mbps SDH/SONET applications and operates from a single +3.3V supply.

The MAX3676 is designed for both section-regenerator and terminal-receiver applications in OC12/STM-4 transmission systems. Its jitter performance exceeds all SONET/SDH specifications.

The MAX3676 has two differential input amplifiers: one accepts positive-referenced emitter-coupled logic (PECL) levels, while the other accepts small-signal analog levels. The analog inputs access the limiting amplifier stage, which provides both a received-signal-strength indicator (RSSI) and a programmable-threshold loss-of-power (LOP) monitor. Selecting the PECL amplifier disables the limiting amplifier, conserving power. A loss-of-lock (LOL) monitor is also incorporated as part of the fully integrated phase-locked loop (PLL).

简化框图

MAX3676:典型工作电路 MAX3676:典型工作电路 Zoom icon

技术文档

支持和培训

在Maxim的知识库中搜索您所需的答案。

过滤搜索

Maxim专业的应用工程师团队也可以为您解答技术问题,请 访问Maxim的 支持中心