The DS2175 is a low-power CMOS elastic-store memory optimized for use in primary rate telecommunications transmission equipment. The device serves as a synchronizing element between async data streams and is compatible with North American (T1-1.544MHz) and European (CEPT-2.048MHz) rate networks. The chip has several flexible operating modes which eliminate support logic and hardware currently required to interconnect parallel or serial TDM backplanes. Application areas include digital trunks, drop and insert equipment, digital cross-connects (DCC), private network equipment, and PABX-to-computer interfaces such as DMI and CPI.
DS2175、DS2175N:原理框图 DS2175、DS2175N:原理框图 放大+


  • Rate buffer for T1 and CEPT transmission systems
  • Synchronizes loop-timed and system-timed data streams on frame boundaries
  • Ideal for T1 (1.544 MHz) to CEPT (2.048MHz), CEPT to T1 interfaces
  • Supports parallel and serial backplanes
  • Buffer depth is 2 frames
  • Comprehensive on-chip "slip" control logic
    • Slips occur only on frame boundaries
    • Outputs report slip occurrences and direction
    • Align feature allows buffer to be recentered at any time
    • Buffer depth easily monitored
  • Compatible with DS2180A T1 and DS2181A CEPT Transceivers
  • Industrial temperature range of -40°C to +85°C available, designated DS2175N
申请可靠性报告: DS2175N 
型号   生产流程   工艺   样本量   不合格   FIT @ 25°C   FIT @ 55°C   Material Composition  

备注: 通过技术手段对故障率进行汇总,并映射到相关的材料部件号。 故障率与被测件的数量密切相关。

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