回到顶部

八通道、13位、电压输出DAC,并行接口

8通道、并行、电压输出DAC

产品详情

主要特征

Parametric specs for Precision DACs (< 1MHz)
Resolution (bits) 13
# Channels 8
Interface Parallel - Full Word
Output Type Voltage- Buffered
Reference Ext.
INL (±LSB) (max) 2
4
Supply Range (V) (min) 5.25
Supply Range (V) (max) 5.25
ICC (mA) (max) 44
Settling Time (µs) (typ) 5
Package/Pins MQFP/44
PLCC/44
Oper. Temp. (°C) -40 to +85
0 to +70
Budgetary
Price (See Notes)
34.39
缩小

简化框图

Technical Docs

支持和培训

在Maxim的知识库中搜索技术问题的答案

过滤搜索

Maxim的专业工程师团队也会为您解答相应的技术问题,请访问Maxim的 支持中心

参量

Parametric specs for Precision DACs (&lt; 1MHz)
Resolution (bits) 13
# Channels 8
Interface Parallel - Full Word
Output Type Voltage- Buffered
Reference Ext.
INL (±LSB) (max) 2
4
Supply Range (V) (min) 5.25
Supply Range (V) (max) 5.25
ICC (mA) (max) 44
Settling Time (µs) (typ) 5
Package/Pins MQFP/44
PLCC/44
Oper. Temp. (°C) -40 to +85
0 to +70
Budgetary
Price (See Notes)
34.39

主要特征

  • Full 13-Bit Performance without Adjustments
  • 8 DACs in One Package
  • Buffered Voltage Outputs
  • Calibrated Linearity
  • Guaranteed Monotonic to 13 Bits
  • ±5V Supply Operation
  • Unipolar or Bipolar Outputs Swing to ±4.5V
  • Fast Output Settling (5µs to ±1/2LSB)
  • Double-Buffered Digital Inputs
  • Asynchronous Load Inputs Load Pairs of DAC Latches
  • Asynchronous active-low CLR Input Resets DACs to Analog Ground
  • Power-On Reset Circuit Resets DACs to Analog Ground
  • Microprocessor and TTL/CMOS Compatible

应用/用途

  • 自动测试设备(ATE)
  • 航空电子与军用系统
  • 数字增益与失调控制
  • 通用产品
  • 工业过程控制

描述

The MAX547 contains eight 13-bit, voltage-output digital-to-analog converters (DACs). On-chip precision output amplifiers provide the voltage outputs. The MAX547 operates from a ±5V supply. Bipolar output voltages with up to ±4.5V voltage swing can be achieved with no external components. The MAX547 has four separate reference inputs; each is connected to two DACs, providing different full-scale output voltages for every DAC pair.

The MAX547 features double-buffered interface logic with a 13-bit parallel data bus. Each DAC has an input latch and a DAC latch. Data in the DAC latch sets the output voltage. The eight input latches are addressed with three address lines. Data is loaded to the input latch with a single write instruction. An asynchronous load (active-low LD_) input transfers data from the input latch to the DAC latch. The four active-low LD_ inputs each control two DACs, and all DAC latches can be updated simultaneously by asserting all active-low LD_ pins. An asynchronous clear (active-low CLR) input resets the output of all eight DACs to AGND_. Asserting active-low CLR resets both the DAC and the input latch to bipolar zero (1000hex). On power-up, reset circuitry performs the same function as active-low CLR. All logic inputs are TTL/CMOS compatible. The MAX547 is available in 44-pin plastic quad flat pack and 44-pin PLCC packages.

简化框图

MAX547:功能原理框图 MAX547:功能原理框图 Zoom icon

Technical Docs

支持和培训

在Maxim的知识库中搜索技术问题的答案

过滤搜索

Maxim的专业工程师团队也会为您解答相应的技术问题,请访问Maxim的 支持中心