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MyMaxim 订阅产品详情
主要特征
应用/用途
Parametric specs for Precision DACs (< 1MHz)
| Resolution (bits) | 12 |
| # Channels | 4 |
| Interface | Serial - SPI |
| Output Type | Voltage- Buffered |
| Reference | Ext. |
| INL (±LSB) (max) | 1 |
| Supply Range (V) (min) | -5.5 |
| Supply Range (V) (max) | 5.5 |
| ICC (mA) (max) | 16 |
| Settling Time (µs) (typ) | 5 |
| Package/Pins | PDIP/16 SOIC (W)/16 |
| Oper. Temp. (°C) | -55 to +125 -40 to +85 0 to +70 |
| Budgetary Price (See Notes) | 34.75 |
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Technical Docs
参量
Parametric specs for Precision DACs (< 1MHz)
| Resolution (bits) | 12 |
| # Channels | 4 |
| Interface | Serial - SPI |
| Output Type | Voltage- Buffered |
| Reference | Ext. |
| INL (±LSB) (max) | 1 |
| Supply Range (V) (min) | -5.5 |
| Supply Range (V) (max) | 5.5 |
| ICC (mA) (max) | 16 |
| Settling Time (µs) (typ) | 5 |
| Package/Pins | PDIP/16 SOIC (W)/16 |
| Oper. Temp. (°C) | -55 to +125 -40 to +85 0 to +70 |
| Budgetary Price (See Notes) | 34.75 |
主要特征
- Four 12-Bit DACs with Output Buffers
- Simultaneous or Independent Control of Four DACs via a 3-Wire Serial Interface
- Power-On Reset
- SPI/QSPI and MICROWIRE Compatible
- ±1 LSB Total Unadjusted Error (MAX536)
- Full 12-Bit Performance without Adjustments
- ±5V Supply Operation (MAX537)
- Double-Buffered Digital Inputs
- Buffered Voltage Output
- 16-Pin DIP/SO Packages
应用/用途
- 数字增益与失调控制
- 通用产品
- 工业过程控制
- 运动控制设备
- 远端工业控制
描述
The MAX536/MAX537 combine four 12-bit, voltage-output digital-to-analog converters (DACs) and four precision output amplifiers in a space-saving 16-pin package. Offset, gain, and linearity are factory calibrated to provide the MAX536's ±1 LSB total unadjusted error. The MAX537 operates with ±5V supplies, while the MAX536 uses -5V and +10.8V to +13.2V supplies.
Each DAC has a double-buffered input, organized as an input register followed by a DAC register. A 16-bit serial word is used to load data into each input/DAC register. The serial interface is compatible with either SPI/QSPI™ or MICROWIRE™, and allows the input and DAC registers to be updated independently or simultaneously with a single software command. The DAC registers can be simultaneously updated with a hardware active-low LDAC pin. All logic inputs are TTL/CMOS compatible.
Each DAC has a double-buffered input, organized as an input register followed by a DAC register. A 16-bit serial word is used to load data into each input/DAC register. The serial interface is compatible with either SPI/QSPI™ or MICROWIRE™, and allows the input and DAC registers to be updated independently or simultaneously with a single software command. The DAC registers can be simultaneously updated with a hardware active-low LDAC pin. All logic inputs are TTL/CMOS compatible.
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