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产品详情
主要特征
应用/用途
Parametric specs for Precision DACs (< 1MHz)
Resolution (bits) | 12 |
# Channels | 2 |
Interface | Serial - SPI |
Output Type | Voltage- Buffered |
Reference | Ext. |
INL (±LSB) (max) | 1 2 |
Supply Range (V) (min) | 2.7 |
Supply Range (V) (max) | 3.6 |
ICC (mA) (max) | 0.6 |
Settling Time (µs) (typ) | 15 |
Package/Pins | QSOP/16 |
Oper. Temp. (°C) | -40 to +85 0 to +70 |
Budgetary Price (See Notes) | 0 |
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参量
Parametric specs for Precision DACs (< 1MHz)
Resolution (bits) | 12 |
# Channels | 2 |
Interface | Serial - SPI |
Output Type | Voltage- Buffered |
Reference | Ext. |
INL (±LSB) (max) | 1 2 |
Supply Range (V) (min) | 2.7 |
Supply Range (V) (max) | 3.6 |
ICC (mA) (max) | 0.6 |
Settling Time (µs) (typ) | 15 |
Package/Pins | QSOP/16 |
Oper. Temp. (°C) | -40 to +85 0 to +70 |
Budgetary Price (See Notes) | 0 |
主要特征
- 12-Bit Dual DAC with Internal Gain of +2V/V
- Rail-to-Rail Output Swing
- 12µs Settling Time
- Single-Supply Operation:
- +5V (MAX5154)
- +3V (MAX5155)
- Low Quiescent Current:
- 500µA (normal operation)
- 2µA (shutdown mode)
- SPI/QSPI and Microwire Compatible
- Available in Space-Saving 16-Pin QSOP Package
- Power-On Reset Clears Registers and DACs to Zero
- Adjustable Output Offset
应用/用途
- 数字增益与失调控制
- 通用产品
- 工业过程控制
- 微处理器控制系统
- 运动控制
- 远端工业控制
描述
The MAX5154/MAX5155 low-power, serial, voltage-output, dual 12-bit digital-to-analog converters (DACs) consume only 500µA from a single +5V (MAX5154) or +3V (MAX5155) supply. These devices feature Rail-to-Rail output swing and are available in a space-saving 16-pin QSOP package. To maximize the dynamic range, the DAC output amplifiers are configured with an internal gain of +2V/V.
The 3-wire serial interface is SPI/QSPI and Microwire compatible. Each DAC has a double-buffered input organized as an input register followed by a DAC register, which allows the input and DAC registers to be updated independently or simultaneously with a 16-bit serial word. Additional features include programmable shutdown (2µA), hardware-shutdown lockout (PDL), a separate reference voltage input for each DAC that accepts AC and DC signals, and an active-low clear input (CL) that resets all registers and DACs to zero. These devices provide a programmable logic pin for added functionality, and a serial-data output pin for daisy chaining.
The 3-wire serial interface is SPI/QSPI and Microwire compatible. Each DAC has a double-buffered input organized as an input register followed by a DAC register, which allows the input and DAC registers to be updated independently or simultaneously with a 16-bit serial word. Additional features include programmable shutdown (2µA), hardware-shutdown lockout (PDL), a separate reference voltage input for each DAC that accepts AC and DC signals, and an active-low clear input (CL) that resets all registers and DACs to zero. These devices provide a programmable logic pin for added functionality, and a serial-data output pin for daisy chaining.