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产品详情
主要特征
应用/用途
Parametric specs for Precision DACs (< 1MHz)
Resolution (bits) | 8 |
# Channels | 4 |
Interface | Parallel - Full Word |
Output Type | Voltage- Buffered |
Reference | Ext. |
INL (±LSB) (max) | 1 |
Supply Range (V) (min) | 4.5 |
Supply Range (V) (max) | 5.5 |
ICC (mA) (max) | 12 |
Settling Time (µs) (typ) | 6 |
Package/Pins | PDIP/24 SOIC (W)/24 SSOP/24 |
Oper. Temp. (°C) | -55 to +125 -40 to +85 0 to +70 |
Budgetary Price (See Notes) | 8.96 |
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Technical Docs
数据资料 | 四路、8位DAC,满摆幅输出 | Jan 01, 1994 |
参量
Parametric specs for Precision DACs (< 1MHz)
Resolution (bits) | 8 |
# Channels | 4 |
Interface | Parallel - Full Word |
Output Type | Voltage- Buffered |
Reference | Ext. |
INL (±LSB) (max) | 1 |
Supply Range (V) (min) | 4.5 |
Supply Range (V) (max) | 5.5 |
ICC (mA) (max) | 12 |
Settling Time (µs) (typ) | 6 |
Package/Pins | PDIP/24 SOIC (W)/24 SSOP/24 |
Oper. Temp. (°C) | -55 to +125 -40 to +85 0 to +70 |
Budgetary Price (See Notes) | 8.96 |
主要特征
- Operate from Single +5V Supply or Dual ±5V Supplies
- Output Buffer Amplifiers Swing Rail-to-Rail
- Reference Input Range Includes Both Supply Rails
- Factory-Calibrated for 1 LSB TUE
- Double-Buffered Digital Inputs (MAX505)
- Microprocessor and TTL/CMOS Compatible
- Require No External Adjustments
- Pin-Compatible Upgrades to MX7225/MX7226
- Now Available in Tiny SSOP Package
应用/用途
- 任意函数发生器
- 自动测试设备
- 数字增益/失调调节
- 工业过程控制
- 元件数最少的模拟系统
- 可编程衰减器
描述
The MAX505 and MAX506 are CMOS, quad, 8-bit voltage-output digital-to-analog converters (DACs). The parts operate with a single +5V supply or a dual ±5V supplies. Internal, precision output buffers swing rail-to-rail. The reference input range includes both supply rails. Offset, gain, and linearity are factory calibrated to provide 1 LSB total unadjusted error (TUE) over the full operating temperature range.
The MAX505 contains double-buffered logic inputs, which allow all analog outputs to be simultaneously updated using the asynchronous load DAC (active-low LDAC) control signal. The MAX505 also has four separate reference inputs, allowing each DAC’s full-scale range to be independently set. The MAX506 has separate inputs latches for each of its four DACs. Data is transferred to the input latches from a common 8-bit input port. The DACs are individually selected through address inputs A0 and A1, and updated by bringing active-low WR low. All MAX506 DACs share a common reference input. All logic inputs are TTL and +5V CMOS compatible.
The MAX505 contains double-buffered logic inputs, which allow all analog outputs to be simultaneously updated using the asynchronous load DAC (active-low LDAC) control signal. The MAX505 also has four separate reference inputs, allowing each DAC’s full-scale range to be independently set. The MAX506 has separate inputs latches for each of its four DACs. Data is transferred to the input latches from a common 8-bit input port. The DACs are individually selected through address inputs A0 and A1, and updated by bringing active-low WR low. All MAX506 DACs share a common reference input. All logic inputs are TTL and +5V CMOS compatible.
Technical Docs
数据资料 | 四路、8位DAC,满摆幅输出 | Jan 01, 1994 |