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1Msps、微处理器接口兼容、8位ADC,带有1µA关断模式

产品详情

主要特征

Parametric specs for Precision ADCs (< 5Msps)
Resolution (bits) (ADC) 8
# Input Channels 1
Conv. Rate (ksps) (max) 1000
Data Bus µP/8
ADC Architecture SAR
Diff/S.E. Input S.E. Only
External VREF (V) (min) -2.5
External VREF (V) (max) 2.5
Bipolar VIN (±V) (max) 5
Package/Pins PDIP/20
SOIC (W)/20
SSOP/20
Budgetary
Price (See Notes)
5.41
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参量

Parametric specs for Precision ADCs (<u><</u> 5Msps)
Resolution (bits) (ADC) 8
# Input Channels 1
Conv. Rate (ksps) (max) 1000
Data Bus µP/8
ADC Architecture SAR
Diff/S.E. Input S.E. Only
External VREF (V) (min) -2.5
External VREF (V) (max) 2.5
Bipolar VIN (±V) (max) 5
Package/Pins PDIP/20
SOIC (W)/20
SSOP/20
Budgetary
Price (See Notes)
5.41

主要特征

  • 660ns Conversion Time
  • Power-Up/Power-Down in 200ns
  • Internal Track/Hold
  • 1Msps Throughput
  • Low Power
    • 40mW (Operating Mode)
    • 5µW (Power-Down Mode)
  • 1MHz Full-Power Bandwidth
  • 20-Pin Narrow DIP, SO, and SSOP Packages
  • No External Clock Required
  • Unipolar/Bipolar Inputs
  • Single +5V or Dual ±5V Supplies
  • Ratiometric Reference Inputs

应用/用途

  • Battery-Powered Systems
  • Burst-Mode Data Acquisition
  • Cellular Telephones
  • Digital-Signal Processing
  • High-Speed Servo Loops
  • Portable Radios
  • Telecommunications

描述

The MAX153 high-speed, microprocessor (µP)-compatible, 8-bit analog-to-digital converter (ADC) uses a half-flash technique to achieve a 660ns conversion time, and digitizes at a rate of 1M samples per second (Msps). It operates with single +5V or dual ±5V supplies and accepts either unipolar or bipolar inputs. An active-low POWERDN (power-down) pin reduces current consumption to a typical value of 1µA (with 5V supply). The part returns from power-down to normal operating mode in less than 200ns, providing large reductions in supply current in applications with burst-mode input signals.

The MAX153 is DC and dynamically tested. Its µP interface appears as a memory location or input/output port that requires no external interface logic. The data outputs use latched, three-state buffered circuitry for direct connection to a µP data bus or system input port. The ADC’s input/reference arrangement enables ratiometric operation.

简化框图

MAX153:功能框图 MAX153:功能框图 Zoom icon

Technical Docs

支持和培训

在Maxim的知识库中搜索技术问题的答案

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Maxim的专业工程师团队也会为您解答相应的技术问题,请访问Maxim的 支持中心