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主要特征
应用/用途
Parametric specs for High-Speed ADCs (> 5Msps)
Resolution (bits) | 10 |
# Input Channels | 1 |
Sample Rate (Msps) (max) | 10 |
Data Bus Interface | µP/10 |
SFDR (dBc) (min) | 72 |
ENOB (bits) (min) | 9.7 |
SINAD (dB) | 60 |
SNR (dB) | 61 |
THD (dB) | -70 |
DNL (±LSB) | 1 |
INL (±LSB) | 1.5 |
Package/Pins | SSOP/28 |
Budgetary Price (See Notes) | 4.06 |
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Technical Docs
数据资料 | 10位、10Msps ADC | Aug 11, 2011 |
支持和培训
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参量
Parametric specs for High-Speed ADCs (> 5Msps)
Resolution (bits) | 10 |
# Input Channels | 1 |
Sample Rate (Msps) (max) | 10 |
Data Bus Interface | µP/10 |
SFDR (dBc) (min) | 72 |
ENOB (bits) (min) | 9.7 |
SINAD (dB) | 60 |
SNR (dB) | 61 |
THD (dB) | -70 |
DNL (±LSB) | 1 |
INL (±LSB) | 1.5 |
Package/Pins | SSOP/28 |
Budgetary Price (See Notes) | 4.06 |
主要特征
- Differential Inputs for High Common-Mode Noise Rejection
- 61dB Signal-to-Noise Ratio (at fIN = 2MHz)
- Internal +2.5V Reference
- 150MHz Input Bandwidth
- Wide ±2V Input Range
- Low Power Consumption: 156mW
- Separate Digital Supply Input for 3V Logic Compatibility
- Single +5V Operation Possible
应用/用途
- CCD像素处理
- 中频与基带数字化
- IR焦平面矩阵
- 医疗超声成像
- 雷达
- 机顶盒
描述
The MAX1426 10-bit, monolithic analog-to-digital converter (ADC) is capable of a 10Msps sampling rate. This device features an internal track-and-hold (T/H) amplifier for excellent dynamic performance; at the same time, it minimizes the number of external components. Low input capacitance of only 8pF minimizes input drive requirements. A wide input bandwidth (up to 150MHz) makes this device suitable for digital RF/IF downconverter applications employing undersampling techniques.
The MAX1426 employs a differential pipelined architecture with a wideband T/H amplifier to maximize throughput while limiting power consumption to only 156mW. The MAX1426 generates an internal +2.5V reference that supplies three additional reference voltages (+3.25V, +2.25V, and +1.25V). These reference voltages provide a differential input range of +2V to -2V. The analog inputs are biased internally to correct the DC level, eliminating the need for external biasing on AC-coupled applications.
A separate +3V digital logic supply input allows for separation of digital and analog circuitry. The output data is in two's complement format. The MAX1426 is available in the space-saving 28-pin SSOP package. For a pin-compatible version at a higher data rate, refer to the MAX1424 or MAX1425.
The MAX1426 employs a differential pipelined architecture with a wideband T/H amplifier to maximize throughput while limiting power consumption to only 156mW. The MAX1426 generates an internal +2.5V reference that supplies three additional reference voltages (+3.25V, +2.25V, and +1.25V). These reference voltages provide a differential input range of +2V to -2V. The analog inputs are biased internally to correct the DC level, eliminating the need for external biasing on AC-coupled applications.
A separate +3V digital logic supply input allows for separation of digital and analog circuitry. The output data is in two's complement format. The MAX1426 is available in the space-saving 28-pin SSOP package. For a pin-compatible version at a higher data rate, refer to the MAX1424 or MAX1425.
Technical Docs
数据资料 | 10位、10Msps ADC | Aug 11, 2011 |
支持和培训
采样:
选择上方“样片”按钮将重定向至第三方ADI样片网站。登录后,所选部件将转移到您在此网站上的购物车。如果您之前从未使用过此网站,请创建一个新帐户。有关此样片网站的任何问题,请联系SampleSupport@analog.com。