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低功耗、90Msps、双路6位ADC

产品详情

主要特征

Parametric specs for High-Speed ADCs (> 5Msps)
Resolution (bits) 6
# Input Channels 2
Sample Rate (Msps) (max) 90
AC Specs (MHz) (@ fIN) 20
SFDR (dBc) (min) 38
ENOB (bits) (min) 5.85
SINAD (dB) 37
DNL (±LSB) 0.25
INL (±LSB) 0.25
Package/Pins SSOP/36
Budgetary
Price (See Notes)
5.15
缩小

简化框图

Technical Docs

数据资料 低功耗、90Msps、双路6位ADC Jun 01, 1997
设计指南 QPSK调制器

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参量

Parametric specs for High-Speed ADCs (> 5Msps)
Resolution (bits) 6
# Input Channels 2
Sample Rate (Msps) (max) 90
AC Specs (MHz) (@ fIN) 20
SFDR (dBc) (min) 38
ENOB (bits) (min) 5.85
SINAD (dB) 37
DNL (±LSB) 0.25
INL (±LSB) 0.25
Package/Pins SSOP/36
Budgetary
Price (See Notes)
5.15

主要特征

  • Two Matched 6-Bit ADCs
  • High Sampling Rate: 90Msps per ADC
  • Low Power Dissipation: 350mW
  • Excellent Dynamic Performance:
    • 5.85 ENOB with 20MHz Analog Input
    • 5.7 ENOB with 50MHz Analog Input
  • ±1/4LSB INL and DNL (typ)
  • Internal Bandgap Voltage Reference
  • Internal Oscillator with Overdrive Capability
  • 55MHz (-0.5dB) Bandwidth Input Amplifiers with True Differential Inputs
  • User-Selectable Input Full-Scale Range (125mVp-p, 250mVp-p, or 500mVp-p)
  • 1/4LSB Channel-to-Channel Offset Matching (typ)
  • 0.1dB Gain and 0.5° Phase Matching (typ)
  • Single-Ended or Differential Input Drive
  • Flexible, 3.3V, CMOS-Compatible Digital Outputs

应用/用途

  • 有线电视机顶盒
  • 直接转播卫星(DBS)接收机
  • VSAT接收器
  • 无线局域网(WLAN)

描述

The MAX1003 is a dual, 6-bit analog-to-digital converter (ADC) that combines high-speed, low-power operation with a user-selectable input range, an internal reference, and a clock oscillator. The dual parallel ADCs are designed to convert in-phase (I) and quadrature (Q) analog signals into two 6-bit, offset-binary-coded digital outputs at sampling rates up to 90Msps. The ability to directly interface with baseband I and Q signals makes the MAX1003 ideal for use in direct-broadcast satellite, VSAT, and QAM16 demodulation applications.

The MAX1003 input amplifiers feature true differential inputs, a -0.5dB analog bandwidth of 55MHz, and user-programmable input full-scale ranges of 125mVp-p, 250mVp-p, or 500mVp-p. With an AC-coupled input signal, matching performance between input channels is typically better than 0.1dB gain, 1/4LSB offset, and 0.5° phase. Dynamic performance is 5.85 effective number of bits (ENOB) with a 20MHz analog input signal, or 5.7 ENOB with a 50MHz signal.

The MAX1003 operates with +5V analog and +3.3V digital supplies for easy interfacing to +3.3V-logic-compatible digital signal processors and microprocessors. It comes in a 36-pin SSOP package.

简化框图

MAX1003:功能框图 MAX1003:功能框图 Zoom icon

Technical Docs

数据资料 低功耗、90Msps、双路6位ADC Jun 01, 1997
设计指南 QPSK调制器

支持和培训

在Maxim的知识库中搜索技术问题的答案

过滤搜索

Maxim的专业工程师团队也会为您解答相应的技术问题,请访问Maxim的 支持中心