DS1021-25, DS1021-50




The DS1021 is an 8-bit programmable delay line that reproduces an input logic state at the output after a user-programmed delay. It is similar to the DS1020 but with the economy of reduced specifications. Available in two versions, total delays are varied over 256 steps and range from an inherent 10ns minimum delay in both versions to a maximum delay of 137.5ns. The DS1021 can be programmed over the 3-wire serial port or the 8-pin parallel port. The DS1021 is TTL- and CMOS-compatible and capable of driving up to ten 74LS-type loads. Both leading- and trailing-edge accuracy are specified.

The DS1021 is an effective, economical solution to the designer working with the complex timing requirements of mismatched ASICs or other components, or with the strict timing tolerances of increasing system clock rates. With the DS1021's programmable outputs, the user can precisely adjust timing to application needs and improve system performance. Innovative circuit designs and factory laser or EPROM trimming enhance accuracy without the need for external components, saving cost and space.
DS1021、DS1021-25、DS1021-50:功能原理框图 DS1021、DS1021-25、DS1021-50:功能原理框图 放大+


  • All-silicon time delay
  • Models with 0.25ns and 0.5ns steps
  • Programmable using 3-wire serial port or 8-bit parallel port
  • Leading and trailing edge accuracy
  • Auto-insertable, low profile
  • Low-power CMOS with TTL compatibility
  • Vapor phase, IR, and wave solderable
申请可靠性报告: DS1021-25  DS1021-50 
型号   生产流程   工艺   样本量   不合格   FIT @ 25°C   FIT @ 55°C   Material Composition  

备注: 通过技术手段对故障率进行汇总,并映射到相关的材料部件号。 故障率与被测件的数量密切相关。

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