电子工程术语和定义,以字母X打头

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XAUI 10吉比特以太网特别工作组的创新。XAUI (读作“Zowie”)是一个10Gbit/s接口。“AUI”代表以太网附件单元接口。“X”代表罗马数字10,含义是每秒10吉比特。XAUI设计为接口扩展器,扩展接口是XGMII,即与接口无关的10吉比特媒介。
XCO 晶体振荡器(XCO):依靠晶体产生其参考时钟的振荡器,压电式晶体振荡器具有非常稳定的频率。
xfmr 请参考:变压器
xmitter 请参考:发送器
XOR Gate

What is an XOR Gate?

“XOR” an abbreviation for “Exclusively-OR.” The simplest XOR gate is a two-input digital circuit that outputs a logical “1” if the two input values differ, i.e., its output is a logical “1” if either of its inputs are 1, but not at the same time (exclusively). The symbol and truth table for an XOR is shown in Figure 1. The Boolean expression for a two-input XOR gate, with inputs A and B and output X:

Digital XOR Gate Symbol

Figure 1. Symbol and truth table for a digital XOR gate

 

What is an XOR gate used for?

The XOR gate has many applications in electronic circuits. It is used in simple digital addition circuits which calculate the sum and carry of two (half-adder) or three (full-adder) bit numbers.

XOR gates are also used to determine the parity of a binary number, i.e., if the total number of 1’s in the number is odd or even. The output of the XOR function, which is 1 if the number of 1’s is odd and 0 if the number of 1’s is even, is referred to as a ‘parity’ bit. This result can be used to perform simple error checking on blocks of digital data being transmitted across a communications link. The parity bit is transmitted along with the original block of data. The receiver performs the XOR function on the received data and if the result matches the received parity bit then there is a limited degree of reassurance that a data error (where a 1 became a 0 or vice versa) did not occur during transmission.

XOR gates are a fundamental building block of cryptographic circuits because XOR logic acts as a simple cipher, i.e., performing an XOR of a digitized message with a binary key produces encrypted ciphertext. Performing an XOR of the ciphertext with the same key reproduces the original message.

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