Settling Time Calculator Tutorial
Steve Edwards*, an experienced analog design engineer, has written several calculators to automate repetitive tasks. These tools are being shared to help other analog design engineers who select, specify, and characterize analog circuits. We will summarize the functionality of one such tool, the Settling Time Calculator.
The Settling Time Calculator (STC) is a program written for the HP50g calculator that aids in the analysis and design of the step response of a single pole RC filter. STC finds the time it takes (ts) for the output voltage to respond to a step input voltage (Vstep) and settle to within a specified fraction (Accu) of the final value. Three additional circuit parameters are found: time constant, cutoff frequency, and rise time.
Ten parameters can be entered or found,
STC can find any of these parameters as a function of the others, making it useful for both design and analysis.
Three additional circuit parameters are found,
- Time Constant, τ, in µs
- Cutoff Frequency, Fc, in kHz
- Rise Time, tr, in µs
The key elements of the plot display are shown below:
The calculator user's guide details an example, STC is used to predict the settling time of the output voltage of a precision digital to analog convertor (DAC) under different load conditions. Trade-offs between settling time, accuracy, and load are examined. The MAX542A precision DAC is used as an example. The application circuit is shown below.
*Steve Edwards is no longer with Maxim.