A similar version of this article appeared in the May 13, 2010 issue of EDN
Microprocessors, microcontrollers, and systems on chip (SoCs) often need a reset pulse to initialize properly. Many of these devices also use separate I/O and core voltage supplies. When multiple supplies are used, the supplies must be turned on in a specific sequence to prevent the circuits from ending up in an unknown state or burning out due to unexpected current paths. The voltages should also be monitored to ensure that the device will not come out of reset until both voltages settle to levels within the operating voltage range.
A previous design idea¹ presents a circuit performing the reset function. Unfortunately this circuit suffers from a number of limitations. The circuit does not monitor the voltage on the 3.3V rail, the 1.8V rail suffers from poor monitoring accuracy since the 3.3V rail is used as a reference, the reset delay may not be present if the power rails are sequenced in the reverse order, the reset pulse has a glitch that could cause problems with the SoC, and the reset delay capacitor may not be reset correctly if power is rapidly cycled.
The inexpensive circuit in Figure 1
uses a MAX6418
to provide a glitch-free reset pulse with a well-defined pulse width to accurately monitor both the 3.3V and the 1.8V rails. Resistors R1 and R2 can be adjusted to set the monitoring threshold for different core voltages according to the following formula: VTH
= 1.263(1 + R1/R2). Adjust C1 for different pulse widths. Calculate C1 using this formula: C1 = (t - 275e-6
), where t is the desired delay in seconds and C1 is in Farads.
Figure 1. Provide your µP or SoC with a clean reset pulse using this circuit.
Two other previous design ideas²,
³ present circuits for sequencing the two power supply rails. One circuit requires quite a few components to achieve a simple function, and the other circuit requires a microcontroller firmware development toolset.
A simpler alternative to those circuits, shown in Figure 2
, implements a sequencing circuit using two MAX6418s acting as voltage detectors. This circuit is useful when performing experiments to determine the proper sequencing order. Adjust R1 and R2 to set the sequence delay for each power rail. Each MAX6418 monitors the voltage on the RC circuit, asserting the output when the capacitor voltage crosses the threshold.
Figure 2. Use this circuit to try out different sequencing delays and adjust the sequencing order.
When the sequence order has been determined, the circuit in Figure 3
provides a practical way to implement the power sequence using a single MAX6418. This approach monitors the output voltage of the previously-sequenced power supply before enabling the next power supply. It also monitors the 5V rail.
Figure 3. Sequence two power supplies with a delay set by C1.
For extremely cost-sensitive applications, the circuit in Figure 4
works quite well although the sequence delay is not well controlled and the voltages are not monitored. Set R1 and C1 to control the sequence delay.
Figure 4. This is the simplest way to sequence two power supplies. R1 and C1 set the sequence delay.
- Ban Hok, Goh, "Reset an SoC only when power is ready," EDN, December 3, 2009, pg 40, www.edn.com/article/CA6709555.
- Karmann, Dan, "Circuit provides simpler power-supply-sequence testing," EDN, December 3, 2009, pg 40, www.edn.com/article/CA6709556.
- Ban Hok, Goh, "Circuit eases power-sequence testing," EDN, July 9, 2009, pg 50, www.edn.com/article/CA6668618.