A similar version of this article appeared in the July 31, 2008 issue of Portable Design
Microprocessor-based systems often include one of the many available 3-pin microprocessor-reset ICs. These devices monitor a single power supply rail, and provide a system reset signal in response to undervoltage conditions. The reset IC input has hysteresis to improve noise immunity and the stability of the system. The amount of hysteresis needed can vary between applications. Normally such ICs exhibit a fixed hysteresis (the voltage difference between rising and falling thresholds on VCC
), but a simple circuit (Figure 1
) lets you adjust that voltage difference.
Figure 1. In this circuit, the RH and RP values let you adjust the hysteresis that determines RESET timing.
rises above 1.0V, the active-low RESET output asserts low to indicate that the input voltage is below the monitoring threshold. Current flows from VIN
to the internal MOSFET driver and through RH
to ground, developing an offset voltage across RH
. Because the internal voltage reference is referred to GND, the offset voltage adds to the VCC
rising threshold. The new rising threshold can be calculated as follows:
crosses this rising threshold and remains above it for the reset timeout, active-low RESET de-asserts and current through RH
drops, allowing the VCC
threshold to shift back to its normal level.
Consider a microprocessor-reset IC (MAX6383XR31D1
) with 3.08V threshold and pullup resistor (RP
) of 10kΩ. If you want the rising threshold to be 3.18V (100mV hysteresis), solve the above equation for RH
(neglecting supply current and the finite on-resistance of the MOSFET output driver), and obtain 324.68Ω. The closest value in standard 1% resistors is 324Ω.
An oscilloscope photo (Figure 2
) shows the circuit operation. The measured rising threshold is 3.1984V and the falling threshold is 3.0891V, producing 109.3mV of hysteresis. The 9.3mV discrepancy (with respect to the calculated value of 100mV) is attributed primarily to MOSFET on-resistance, supply current into the device, and resistor tolerances.
Figure 2. These waveforms from the Figure 1 circuit show 100mV hysteresis. That is, the difference in volts at which VCC (CH1) intersects the rising and falling edges of active-low RESET (CH2) is 100mV
Note that RH
increases the active-low RESET output VOL
(logic-low output voltage) by the hysteresis voltage. In this case, VOL
measures a maximum of 127mV. You should therefore check to ensure that circuitry connected to active-low RESET can tolerate the higher VOL