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Simple Logic-Level Translation Interfaces 1.8V Microcontrollers and 3V Peripherals
应用笔记 3498
Simple Logic-Level Translation Interfaces 1.8V Microcontrollers and 3V Peripherals
摘要 : Interfacing a 1.8V microcontroller to a 3V peripheral poses a design challenge, because the logic output of the microcontroller cannot satisfy the peripheral's VIH and VIL requirements. A logic-level translator needs to be used to interface the two devices. The interface circuit can consist of a simple resistor and diode or an integrated logic-level translator.
Microcontrollers (µCs) powered from 1.8V cannot meet the VIH requirements of peripheral devices that have typical CMOS inputs and are powered from 3V. General-purpose I/O pins on µCs are either open-drain structures that pull up to VDD or down to near GND, or are push-pull outputs that pull up to nearly VDD and down to nearly GND. These general-purpose I/Os need to be able to drive shutdown or interrupt pins of peripheral devices, even when the peripheral is powered from a supply higher than the µC's power supply. The circuit shown in Figure 1 solves this problem with a simple level translator circuit.
Typical peripheral CMOS I/O pins have a VIH of (0.7 x VDD) and a VIL of (0.3 x VDD). When powered from a 3V supply, these voltages are 2.1V and 900mV, respectively. Valid digital signals connected to these logic pins must drive higher than VIH, and pull lower than VIL, to ensure proper communication. The circuit in Figure 1 shows the MAX9718, a 1.4W audio power amplifier that employs a CMOS active-low SHDN input. The VIH and VIL levels of the active-low SHDN input are as described above.
The µC I/O in Figure 1 is an open-drain I/O pulled up to 1.8V. When the open-drain output is low, the voltage at the MAX9718's active-low SHDN pin is equal to one diode-forward voltage above GND, about 0.7V, which is well below the VIL of the MAX9718's active-low SHDN input. When the open-drain output goes high, the voltage at active-low SHDN rises to 2.5V and the MAX9718 is able to turn on.
Figure 1. Simple level translator.
Integrated level translators are available to simplify interconnect between two devices that do not share the same power supply. Devices such as the MAX13013 can translate a 1.2V digital signal to a 3.6V device at a speed of 100Mbps. Figure 2 shows the proper connections for using the MAX13013 to interface a µC with the MAX9718.
Figure 2. Using the MAX13013 to interface a µC to the MAX9718.
Typical peripheral CMOS I/O pins have a VIH of (0.7 x VDD) and a VIL of (0.3 x VDD). When powered from a 3V supply, these voltages are 2.1V and 900mV, respectively. Valid digital signals connected to these logic pins must drive higher than VIH, and pull lower than VIL, to ensure proper communication. The circuit in Figure 1 shows the MAX9718, a 1.4W audio power amplifier that employs a CMOS active-low SHDN input. The VIH and VIL levels of the active-low SHDN input are as described above.
The µC I/O in Figure 1 is an open-drain I/O pulled up to 1.8V. When the open-drain output is low, the voltage at the MAX9718's active-low SHDN pin is equal to one diode-forward voltage above GND, about 0.7V, which is well below the VIL of the MAX9718's active-low SHDN input. When the open-drain output goes high, the voltage at active-low SHDN rises to 2.5V and the MAX9718 is able to turn on.
Figure 1. Simple level translator.
Integrated level translators are available to simplify interconnect between two devices that do not share the same power supply. Devices such as the MAX13013 can translate a 1.2V digital signal to a 3.6V device at a speed of 100Mbps. Figure 2 shows the proper connections for using the MAX13013 to interface a µC with the MAX9718.
Figure 2. Using the MAX13013 to interface a µC to the MAX9718.
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