DS26502

T1/E1/J1/64KCC BITS Element

Industry's Only 64kHz Composite-Clock Transceivers
 Overview   Design Resources   Ordering Info   Related Products   All   

Status Explanations for product status codes

Part Number Status
DS26502 Active: In Production. See Ordering Information for details.

Description

The DS26502 is a building-integrated timing-supply (BITS) clock-recovery element. It also functions as a basic T1/E1 transceiver. The receiver portion can recover a clock from T1, E1, 64kHz composite clock (64KCC), and 6312kHz synchronization timing interfaces. In T1 and E1 modes, the Synchronization Status Message (SSM) can also be recovered. The transmit portion can directly interface to T1, E1, or 64KCC synchronization interfaces as well as source the SSM in T1 and E1 modes. The DS26502 can translate between any of the supported inbound synchronization clock rates to any supported outbound rate. A separate output is provided to source a 6312kHz clock. The device is controlled through a parallel, serial, or hardware controller port.

Data Sheet

Download this datasheet in PDF formatDownload Rev 8 (PDF, 3.1MB)
Send this datasheet to any email addressEmail

My Maxim: Not Logged In
By logging in to My Maxim you can subscribe to alerts for this data sheet.

Login | Register
Errata DS26502 26502A2.pdf
Errata DS26502 26502B1.pdf
Errata DS26502 26502C1.pdf
An evaluation board is available: DS26502DK

Key Features

  • G.703 2048kHz Synchronization Interface Compliant
  • G.703 64kHz Centralized (Option A) and Codirectional Timing Interface Compliant
  • G.703 Appendix II 64kHz and 6312kHz Japanese Synchronization Interface Compliant
  • Interfaces to Standard T1/J1 (1.544MHz) and E1 (2.048MHz)
  • Interface to CMI-Coded T1/J1 and E1
  • Short- and Long-Haul Line Interface
  • Transmit and Receive T1 and E1 SSM Messages with Message Validation
  • T1/E1 Jitter Attenuator with Bypass Mode
  • Fully Independent Transmit and Receive Functionality
  • Internal Software-Selectable Receive- and Transmit-Side Termination for 75Ω/100Ω/110Ω/120Ω T1, E1, and Composite Clock Interfaces
  • Monitor Mode for Bridging Applications
  • Accepts 16.384MHz, 12.8MHz, 8.192MHz, 4.096MHz, 2.048MHz, or 1.544MHz Master Clock
  • 64kHz, 8kHz, and 400Hz Outputs in Composite Clock Mode
  • 8-Bit Parallel Control Port, Multiplexed or Nonmultiplexed, Intel or Motorola
  • Serial (SPI) Control Port
  • Hardware Control Mode
  • Provides LOS, AIS, and LOF Indications Through Hardware Output Pins
  • Fast Transmitter-Output Disable Through Device Pin for Protection Switching
  • IEEE 1149.1 JTAG Boundary Scan
  • 3.3V Supply with 5V Tolerant Inputs and Outputs
 

Applications/Uses

  • BITS Timing
  • Rate Conversion
   

Key Specifications:

T/E Carrier & Packetized Products
Part Number Transmission Standard Functions Channels In-to-Out Clocks
(MHz)
VSUPPLY
(V)
Budgetary
Price
See Notes
DS26502 
64kHz - G.703 II.1 Japanese 64kHz Clock
64kHz - G.703 II.2 Japanese 6312kHz Clock
64kHz Composite Clock - G.703 Level A
T1/E1/J1
BITS Element 1
0.064
1.544
2.048
6.312
19.44
3.3 $15.45 @1k
See All T/E Carrier & Packetized Products (88)

Pricing Notes:

This pricing is BUDGETARY, for comparing similar parts. Prices are in U.S. dollars and subject to change. Quantity pricing may vary substantially and international prices may differ due to local duties, taxes, fees, and exchange rates. For volume-specific and version-specific prices and delivery, please see the price and availability page or contact an authorized distributor.



Diagram

DS26502: Block Diagram
Block Diagram

More Information

New Product Press Release   2004-07-20 ]

Didn't Find What You Need?

Information Index

Rev 8; 2008-05-01
This page last modified: 2009-10-07