1.8V, 10-Bit, 250Msps Analog-to-Digital Converter with LVDS Outputs for Wideband Applications

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Status Explanations for product status codes

Part Number Status
MAX1124 Active: In Production. See Ordering Information for details.


The MAX1124 is a monolithic 10-bit, 250Msps analog-to-digital converter (ADC) optimized for outstanding dynamic performance at high IF frequencies up to 500MHz. The product operates with conversion rates of up to 250Msps while consuming only 477mW.

At 250Msps and an input frequency of 100MHz, the MAX1124 achieves a spurious-free dynamic range (SFDR) of 71dBc. Its excellent signal-to-noise ratio (SNR) of 57.1dB at 10MHz remains flat (within 1dB) for input tones up to 500MHz. This makes the MAX1124 ideal for wideband applications such as digital predistortion in cellular base-station transceiver systems.

The MAX1124 requires a single 1.8V supply. The analog input is designed for either differential or single-ended operation and can be AC- or DC-coupled. The ADC also features a selectable on-chip divide-by-2 clock circuit, which allows the user to apply clock frequencies as high as 500MHz. This helps to reduce the phase noise of the input clock source. A differential LVDS sampling clock is recommended for best performance. The converter's digital outputs are LVDS compatible, and the data format can be selected to be either two's complement or offset binary.

The MAX1124 is available in a 68-pin QFN with exposed pad (EP) and is specified over the industrial (-40°C to +85°C) temperature range.

For pin-compatible, lower speed versions of the MAX1124, refer to the MAX1122 (170Msps) and the MAX1123 (210Msps) data sheets. For a pin-compatible 8-bit version of the MAX1124, refer to the MAX1121 data sheet.

See a parametric table of the complete family of pin-compatible, 8-/10-/12-bit high-speed ADCs.

Data Sheet

Download this datasheet in PDF formatDownload Rev 2 (PDF, 240kB)
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An evaluation board is available: MAX1124EVKIT

Key Features

  • 250Msps Conversion Rate
  • SNR = 56.8dB/55.5dB at fIN = 100MHz/500MHz
  • SFDR = 71dBc/63.8dBc at fIN = 100MHz/500MHz
  • NPR = 54.8dB at fNOTCH = 28.8MHz
  • Single 1.8V Supply
  • 477mW Power Dissipation at 250Msps
  • On-Chip Track-and-Hold and Internal Reference
  • On-Chip Selectable Divide-by-2 Clock Input
  • LVDS Digital Outputs with Data Clock Output
  • Evaluation Kit Available (Order MAX1124EVKIT)


  • Cable-Head End Systems
  • Communications Test Equipment
  • Digital Predistortion Receivers
  • Radar and Satellite Subsystems Antenna Array Processing
  • Wireless and Wired Broadband Communication

Key Specifications:

High-Speed ADCs (> 5Msps)
Part Number Input Chan. Resolution
Sample Rate
AC Specs
Full Pwr. BW
Data Bus Interface Budgetary
max ≥ @ fIN min min typ See Notes
MAX1124  1 10 250 180 68.3 56 56.3 0.5 0.8 600 265
$39.07 @1k
See All High-Speed ADCs (> 5Msps) (73)

Pricing Notes:

This pricing is BUDGETARY, for comparing similar parts. Prices are in U.S. dollars and subject to change. Quantity pricing may vary substantially and international prices may differ due to local duties, taxes, fees, and exchange rates. For volume-specific and version-specific prices and delivery, please see the price and availability page or contact an authorized distributor.


MAX1124: Block Diagram
Block Diagram

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Document Ref.: 19-3029 Rev 2; 2008-09-09
This page last modified: 2009-10-08