The MAX9209/MAX9213 serialize 21 bits of LVTTL/LVCMOS parallel input data to three LVDS outputs. A parallel rate clock on a fourth LVDS output provides timing for deserialization.
The MAX9209/MAX9213 feature programmable DC balance, which allows isolation between the serializer and deserializer using AC-coupling. The DC balance circuits on each channel code the data, limiting the imbalance of transmitted ones and zeros to a defined range. The companion MAX9210/MAX9214 deserializers decode the data. When DC balance is not programmed, the serializers are compatible with non-DC-balanced, 21-bit serializers such as the DS90CR215 and DS90CR217.
Two frequency ranges and two DC-balance default conditions are available for maximum replacement flexibility and compatibility with existing non-DC-balanced serializers.
The MAX9209/MAX9213 are available in TSSOP and space-saving thin QFN packages.