Maxim > Products > Interface > MAX3421E


USB Peripheral/Host Controller with SPI Interface

A Single IC with USB Functionality
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Status Explanations for product status codes

Active: In Production.


The MAX3421E USB peripheral/host controller contains the digital logic and analog circuitry necessary to implement a full-speed USB peripheral or a full-/low-speed host compliant to USB specification rev 2.0. A built-in transceiver features ±15kV ESD protection and programmable USB connect and disconnect. An internal serial interface engine (SIE) handles low-level USB protocol details such as error checking and bus retries. The MAX3421E operates using a register set accessed by an SPI interface that operates up to 26MHz. Any SPI master (microprocessor, ASIC, DSP, etc.) can add USB peripheral or host functionality using the simple 3- or 4-wire SPI interface.

The MAX3421E makes the vast collection of USB peripherals available to any microprocessor, ASIC, or DSP when it operates as a USB host. For point-to-point solutions, for example, a USB keyboard or mouse interfaced to an embedded system, the firmware that operates the MAX3421E can be simple since only a targeted device is supported.

Internal level translators allow the SPI interface to run at a system voltage between 1.4V and 3.6V. USB-timed operations are done inside the MAX3421E with interrupts provided at completion so an SPI master does not need timers to meet USB timing requirements. The MAX3421E includes eight general-purpose inputs and outputs so any microprocessor that uses I/O pins to implement the SPI interface can reclaim the I/O pins and gain additional ones.

The MAX3421E operates over the extended -40°C to +85°C temperature range and is available in a 32-pin TQFP package (5mm x 5mm) and a 32-pin TQFN package (5mm x 5mm).

Data Sheet

Download this datasheet in PDF formatDownload Rev 4 (PDF, 284.8kB)
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Errata MAX3421E MAX3421E_REV1.pdf
An evaluation board is available: MAX3421EVKIT-1

Key Features

  • Microprocessor-Independent USB Solution
  • Software Compatible with the MAX3420E USB Peripheral Controller with SPI Interface
  • Complies with USB Specification Revision 2.0 (Full-Speed 12Mbps Peripheral, Full-/Low-Speed 12Mbps/1.5Mbps Host)
  • Integrated USB Transceiver
  • Firmware/Hardware Control of an Internal D+ Pullup Resistor (Peripheral Mode) and D+/D- Pulldown Resistors (Host Mode)
  • Programmable 3- or 4-Wire, 26MHz SPI Interface
  • Level Translators and VL Input Allow Independent System Interface Voltage
  • Internal Comparator Detects VBUS for Self-Powered Peripheral Applications
  • ESD Protection on D+, D-, and VBCOMP
  • Interrupt Output Pin (Level- or Programmable-Edge) Allows Polled or Interrupt-Driven SPI Interface
  • Eight General-Purpose Inputs and Eight General-Purpose Outputs
  • Interrupt Signal for General-Purpose Input Pins, Programmable Edge Polarity
  • Intelligent USB SIE
  • Automatically Handles USB Flow Control and Double Buffering
  • Handles Low-Level USB Signaling Details
  • Contains Timers for USB Time-Sensitive Operations so SPI Master Does Not Need to Time Events
  • Space-Saving Lead-Free TQFP and TQFN Packages (5mm x 5mm)


  • Cameras
  • Custom USB Devices
  • Desktop Routers
  • Embedded Systems
  • Instrumentation
  • Medical Devices
  • Microprocessors and DSPs
  • MP3 Players
  • PDAs
  • PLCs
  • Set-Top Boxes

Key Specifications:

USB Controllers
Part Number VSUPPLY
Host Speed
Peripheral Speed
SPI Clock
Oper. Temp.
max See Notes
MAX3421E  3.3 45 12/1.5 12 0 to 26 1.4 to 3.6 -40 to +85 $4.00 @1k
See All USB Controllers (2)

Pricing Notes:

This pricing is BUDGETARY, for comparing similar parts. Prices are in U.S. dollars and subject to change. Quantity pricing may vary substantially and international prices may differ due to local duties, taxes, fees, and exchange rates. For volume-specific and version-specific prices and delivery, please see the price and availability page or contact an authorized distributor.


MAX3421E: Typical Application Circuit
Typical Application Circuit

More Information

New Product Press Release   2006-02-21 ]

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Document Ref.: 19-3953 Rev 4; 2013-07-19
This page last modified: 2013-07-19